First a screen of the automation circuit :
The memory toggle on the right says there's an invalid port overlap. But the only overlap came from the bridge, and it's not upon one of the port of the memory toggle.
I tried in sandbox mode with the AND gate, and the same behavior occurs.
Also note on the memory toggle on the right that breaking the bridge do not remove the error. :-/
Steps to Reproduce
Build a logic gate. Put a bridge with one end on the tile where the logic gate don't have port. Remove the bridge to see that the error do not disappear.
Build a logic gate. Put a bridge with one end on the tile where the logic gate don't have port. Remove the bridge to see that the error do not disappear.
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