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AND Gate invalid port overlap behind steam turbine


darklinio
  • Branch: Live Branch Version: Linux Pending

Hello,

I got a message when i build a AND gate behind a steam turbine.

It don't disturb the AND gate(it work normally)

Capture d’écran de 2019-05-25 11-02-23.png


Steps to Reproduce
1)Build a steam turbine 2)Build a AND Gate behind the steam turbine 3)enjoy the message



User Feedback


I played around with this and the bug is unrelated to the steam turbine. Here is how you trigger this bug:

  1. Build one of the 2x2 gates (AND, OR etc)
  2. Place an automation wire bridge on the empty cell on the gate
  3. Remove the automation wire bridge

The incorrect message about overlapping ports comes when step 2 is completed and step 3 doesn't fix it. Placing a sensor in the same cell doesn't trigger this bug and gates can't overlap, meaning it's apparently purely a problem with automation wire bridge vs 2x2 gates.

Placing the wire bridge first prevents building the gate even though it's a valid location.

 

I highly suspect the cause to be related this this piece of code: BuildingDef.MarkArea(). Maybe 2x2 gates mark all 4 cells when it should only mark 3 of them.

	if (this.BuildLocationRule == BuildLocationRule.LogicBridge)
	{
		LogicPorts component2 = go.GetComponent<LogicPorts>();
		if (component2 != null && component2.inputPortInfo != null)
		{
			LogicPorts.Port[] inputPortInfo = component2.inputPortInfo;
			for (int j = 0; j < inputPortInfo.Length; j++)
			{
				LogicPorts.Port port = inputPortInfo[j];
				CellOffset rotatedCellOffset6 = Rotatable.GetRotatedCellOffset(port.cellOffset, orientation);
				int cell9 = Grid.OffsetCell(cell, rotatedCellOffset6);
				this.MarkOverlappingPorts(Grid.Objects[cell9, (int)layer], go);
				Grid.Objects[cell9, (int)layer] = go;
			}
		}
	}

 

Edited by Nightinggale

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