Negative logic explained in 5 minutes

[avc15]

Hi guys,

This is meant for people who don't know much about automation. In ONI, any basic logic circuit can be reduced to something smaller by using negative logic. Relating to a build I posted about earlier, here is a basic example that explains NOR logic in the simplest way possible. (NOR logic is the most useful kind of negative logic in ONI)

I have a sieve that I am only allowing to run when it can process the full amount per tic, that is 5kg of pwater. To do that, only allow the sieve to run when its input pipe is full and its output pipe is empty. We'll use the full pipe sensor for this purpose, and a quick segue into that: (as far as I know this design was first shown on the forum by Saturnus, but I could be wrong)

 

Now here's the sieve. I only let it run when the input pipe (left sensor) is full and the output pipe is not:

But, I can do this without the AND gate, by using an identity:

So, here's how I can build my circuit with negative logic and make it smaller (this once it doesn't reduce the number of gates, just makes the circuit small)

 

 

Compare the before & after:

Why does it matter?

In more complicated circuits you will find that negative logic can cut down your number of gates significantly. In extreme cases, by more than 50%. In cases where it doesn't, like the one I've shown here, it'll at least make the circuit more compact.

In real life negative logic isn't generally used to simplify circuits. Because wiring together two outputs isn't the same as an OR, in reality negative logic increases the gate count for almost every circuit. Really what negative logic is useful for is manufacturing, especially programmable ICs. Most programmable ICs (like, EEPROMs) come in the form of a large array of NAND gates, because you can make anything out of it.

Hope it's useful for someone.

[sktzofreak101]

Sorry for the derail, but you can put pipe sensors on top of bridge ends?!

[ZanthraSW]

That's De Morgan's Laws, and can definitely help simplify things. Although for more complex circuits Truth Tables and Karnaugh Maps are probably the way to go to get minimum sized logic.

https://en.wikipedia.org/wiki/Karnaugh_map

[Gus Smedstad]

3 hours ago, sktzofreak101 said:

Sorry for the derail, but you can put pipe sensors on top of bridge ends?!

Of course. Pipe sensors aren’t pipe, they’re buildings that happen to interact with pipes.

However, the behavior may not be what you expect. Bridges teleport fluids, so if you put a sensor on the input side of a bridge, it will not read anything unless the pipe is backed up, and the bridge can’t teleport the fluid to the destination pipe segment.

Sometimes you may want to use that effect intentionally, but generally I avoid doing it because it’s easier to predict what happens with regular pipe.

[avc15]

4 hours ago, sktzofreak101 said:

Sorry for the derail, but you can put pipe sensors on top of bridge ends?!

It's not a derailment, that's part of the content of the post after all.

But here's one use, for example. Using a full pipe sensor you can manage the input pump for a mechanical filter:

The gas pump only runs if that pipe to exosuit docks is not full. Deals with the drawback of a mechanical filter very effectively.

 

 

3 hours ago, ZanthraSW said:

Truth Tables and Karnaugh Maps are probably the way to go to get minimum sized logic.

Yes. Though, NOR logic is a very strong tool in ONI, more than in real life. Because:

• You don't need OR gates (every circuit can be built with just NOTs)
• So many sensors have a built-in NOT (above/below)

So negative logic is always at least more compact in ONI than positive logic, and usually reduces gate count a lot.  And it's easier than a karnaugh map, especially for someone who doesn't know what the heck that is :b

[ZanthraSW]

1 hour ago, avc15 said:

Yes. Though, NOR logic is a very strong tool in ONI, more than in real life. Because:

• You don't need OR gates (every circuit can be built with just NOTs)
• So many sensors have a built-in NOT (above/below)

So negative logic is always at least more compact in ONI than positive logic, and usually reduces gate count a lot.  And it's easier than a karnaugh map, especially for someone who doesn't know what the heck that is :b

True, as long as you don't need the inputs individually for something else. Once you wire two values together, wherever you sample them you will always have the OR of those values. If you need one without the other at any point you will either have to buffer the value, or use the normal gates.

[ZanthraSW]

36 minutes ago, Saturnus said:

It bears reminding that because circuits in ONI generally are relatively simple then NOR logic generally works really well. However, in cases where you need isolated inputs on the gates you can just use NAND logic instead. At the most basic level a NOR gate is a NOT with two or more lines tied together at the input whereas a NAND gate is two or more NOT gates tied together at the output thereby having input isolation built in. 

That's De Morgan's law again. !(AB) = !A + !B, but that still can't always simplify things.

Here is an example of a XOR gate built with NOTs. The furthest to the left has a problem where both NOT gates from the inputs should go GREEN, but due to the cross connection turning them green would turn them RED again, the game can't properly calculate it and depicts them all RED. Using buffers to solve that problem works, but it's much more efficient to use the AND gate. Of course in any real circuit one should just use the XOR gate available, but there are other circuits where this sort of input overwriting can be a problem.

[ZanthraSW]

Sorry, I was not aware.

[ZanthraSW]

If interpreting any connected wires as an OR gate, then your XOR gate would be:

!(!A + !(!A + !B)) + !(!B + !(!A + !B))

Which has the same truth table as an XOR, same as the one I proposed:

!(!!A + !B) + !(!A + !!B)

I don't see why it would be incorrect. To avoid the one tick pulse when both inputs go from low to high at the same time, delay AND gates can be put on the cross connections from the inputs after the single not before the wired OR.

[Gurgel]

10 hours ago, ZanthraSW said:

That's De Morgan's Laws, and can definitely help simplify things. Although for more complex circuits Truth Tables and Karnaugh Maps are probably the way to go to get minimum sized logic.

https://en.wikipedia.org/wiki/Karnaugh_map

For ONI, you need to use wired-OR, as you need gates with multiple inputs for that to work. May still not work because of the number of inverters needed then. 

[ZanthraSW]

15 minutes ago, Saturnus said:

Does yours work? No.

Does mine work? Yes.

Mine uses NAND gates. Yours use NOR gates.

I'll just reiterate my post above.

 

Sorry, there must have been some miscommunication somewhere on which circuit I was refering to or where the inputs were. This is the circuit I was refering to as being the working XOR gate from NOT and wired OR gates at the four input states 00, 01, 10, and 11.

[ZanthraSW]

The point is that removing all AND and OR gates and making all your logic with NOT and wired OR will not always simplify the problem, especially when an input is used in both it’s normal and NOTed form in the same circuit. You can save at least the two NOT gates used to buffer the input by using an OR gate instead of wired OR. In the XOR example it saves not just the input buffer, but De Morgan’s lets the inputs be inverted to remove the output inverter after the OR as well. Going from:

!(!!A + !B) + !(!A + !!B)

to

(!A * B) + (A * !B)

For a reduction of 8 NOT gates to 2 NOT gates and 2 AND gates.

I argue that while the OPs statement of “In ONI, any basic logic circuit can be reduced to something smaller by using negative logic.” may be commonly applicable, you can quickly run into problems where it is not the case, especially when an input you want to OR with something is used elsewhere also.

[Gus Smedstad]

18 minutes ago, Saturnus said:

I assume deliberately

It’s way, WAY to early to be assuming ill intent like this. Particularly since he’s already apologized to you once in this thread. Best to keep the irritated jabs about arguing in bad faith under control until a thread has devolved into multipage screeds like the ethanol thread.

What I got from his example was pretty much in line with your correction: that the middle (correctly working) example’s kind of bulky, and that gate reduction isn’t always possible.

I do wish the argument were about a practical in-game problem; the argument over XOR seems abstract given that we have an actual XOR gate these days. Personally, I find that the game rarely calls for anything complex. Control systems at the surface (bunker door controls, rocket launch controls) are the only examples that readily come to mind.

[avc15]

I'm disappointed this turned into a technical debate. Nobody owns these concepts that isn't over 200 years old, and making topics off limits because they were discussed last year is unfair.

 

That said, turning an XOR into NOT gates isn't in line with the objective of this topic. The topic wasn't about how to do everything with NOT gates (consider the audience I named right off), it was a topic about simplifying circuits. Sure you can do anything at all with a grid of NANDs, but that's not useful in ONI.

 

But hey, this is what happens when you put a bunch of engineers in a conference. It's okay.

 

 

[Yoma_Nosme]

51 minutes ago, avc15 said:

But hey, this is what happens when you put a bunch of engineers in a conference. It's okay.

Hahaha. Soo true

Basically same as rl...you know the saying? I've posted it once before couple years ago...

An optimist says, the glass is half full.

A pessimist says, the glass is half empty.

Here comes the engineer and concludes that the glass is double the size it has to be

 

[Gurgel]

7 hours ago, Yoma_Nosme said:

Here comes the engineer and concludes that the glass is double the size it has to be

In this, I fail to be an engineer. But I do observe other engineers thinking like that regularly.

[storm6436]

On 9/5/2019 at 12:47 PM, Yoma_Nosme said:

Here comes the engineer and concludes that the glass is double the size it has to be

 And this is the part where introducing a physicist ends in two possible states:

1. Via normailzation of variables one can conclude  either the glass needs reduced by a factor of two, or the water needs increased by the same depending on how one wants to define their efficiency.

2. Factors of two are ignorable and the current state is approximately just fine as it is.

[Aelfled]

Proper physicist points out the glass is full, the other half is air!

[beowulf2010]

All while the computer scientist grumbles at being forced to change the Glass variable definition from integer to float. 

[Craigjw]

On 05/09/2019 at 6:47 PM, Yoma_Nosme said:

Hahaha. Soo true

Basically same as rl...you know the saying? I've posted it once before couple years ago...

An optimist says, the glass is half full.

A pessimist says, the glass is half empty.

Here comes the engineer and concludes that the glass is double the size it has to be

 

I totally disagree with this.

The optimist; the glass is just empty and will order a new round immediately, ensuring inebriation.

The pessimist; will see the glass full and be left soberly standing at the bar with no drink.

[Chthonicone]

On 9/4/2019 at 6:28 PM, avc15 said:

Hi guys,

This is meant for people who don't know much about automation. In ONI, any basic logic circuit can be reduced to something smaller by using negative logic. Relating to a build I posted about earlier, here is a basic example that explains NOR logic in the simplest way possible. (NOR logic is the most useful kind of negative logic in ONI)

I have a sieve that I am only allowing to run when it can process the full amount per tic, that is 5kg of pwater. To do that, only allow the sieve to run when its input pipe is full and its output pipe is empty. We'll use the full pipe sensor for this purpose, and a quick segue into that: (as far as I know this design was first shown on the forum by Saturnus, but I could be wrong)

 

Now here's the sieve. I only let it run when the input pipe (left sensor) is full and the output pipe is not:

But, I can do this without the AND gate, by using an identity:

So, here's how I can build my circuit with negative logic and make it smaller (this once it doesn't reduce the number of gates, just makes the circuit small)

 

 

Compare the before & after:

Why does it matter?

In more complicated circuits you will find that negative logic can cut down your number of gates significantly. In extreme cases, by more than 50%. In cases where it doesn't, like the one I've shown here, it'll at least make the circuit more compact.

In real life negative logic isn't generally used to simplify circuits. Because wiring together two outputs isn't the same as an OR, in reality negative logic increases the gate count for almost every circuit. Really what negative logic is useful for is manufacturing, especially programmable ICs. Most programmable ICs (like, EEPROMs) come in the form of a large array of NAND gates, because you can make anything out of it.

Hope it's useful for someone.

Not to dissuade your conversation about logic in the game, but in my experience a water sieve will actually not perform an operation until it has collected the full 5 kg of polluted water it is waiting on. Not sure why you'd need this kind of automation for that.

If you don't believe me, set a valve to 1 kg of water going into it, and watch it's contents. It will only collect water till it hits 5 kg and then it acts.

[avc15]

Here's a much better case.

I have here a pair of A/Ts that (1) I can't quite power with the power plant I've got, (2) Can't quite reject heat quickly enough to prevent the A/Ts from overheating, and (3) need to turn off once the cold tank gets near -8C (or the water will freeze in pipes)

I have many criticisms for this build in its present form, so, I'm not going to dwell on improvements not yet made. It's the first form of a smokestack build, just barely turned on for the first time. Many, many improvements to be made, but there is this immediate problem to solve: don't overheat it, don't over-cool, don't paralyze my power grid by loading it too heavily.

So here, I could do it like this: if - (1) hot tank temp is below 165F, AND (2) cold tank temp is above -8C, AND (3) smart battery hysteresis NOT (50->30), pump to the aqua tuners. That's the intuitive way of thinking about it, and that'd look like this:

3 sensors, 3 gates.

If I apply the NOR identity and reverse the sign on both temp sensors:

 

3 sensors, 1 gate.

Conventional logic triples the gate count of NOR logic in this case, and it's a pretty common result.

As @Saturnus mentioned, state machines require additional isolation. Anything that calculates one result from another result, or that has a delay that triggers something else to happen, might be better off in NAND logic. But for small basic circuits NOR is the easy one to use & produces good results.

 

 

[Yunru]

On 05/09/2019 at 12:06 PM, Saturnus said:

so what's the point.

Because his all look like penises.

[Clinch]

On 9/4/2019 at 8:17 PM, ZanthraSW said:

That's De Morgan's Laws, and can definitely help simplify things. Although for more complex circuits Truth Tables and Karnaugh Maps are probably the way to go to get minimum sized logic.

https://en.wikipedia.org/wiki/Karnaugh_map

I had a prof in uni for Digital Logic that would frequently use the phrase, "After we De Morgan this to death"...