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Arnadath

Arnadath's canon of gate equivalence

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Saturnus    3,303
10 minutes ago, Zarquan said:

For example, in Saturnus's NAND, he has the wires from the two signal switches link up.  If you were to do this in the real world, and the two switches were opposite, it would short circuit.

Uhm... no. It's a basic "totem pole" NAND gate. You can build this on a breadboard to test it if you like.

image.thumb.png.06af575ff12d07b7664fde2fdbd5f772.png

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Arnadath    69
46 minutes ago, Saturnus said:

With the knowledge that NAND gates are "perfect" universal gates for our purpose as they're inherently buffered, we can start building circuits using just NAND gates as is most often the case in real life. For example here I've built a XOR gate from 4 NAND gates, ie. 8 NOTs down from 11 as in your example using mixed gates.

Both our designs have a problem, and it's the same problem. If you change the input from "00" to "11" there will be a 1 tick of '1' in the output. You can fix the behavioural by making the nor condition happen 1 tick later than the AND condition, with two OR gates in each input.  

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Zarquan    665
12 minutes ago, Saturnus said:

Uhm... no. It's a basic "totem pole" NAND gate. You can build this on a breadboard to test it if you like.

image.thumb.png.06af575ff12d07b7664fde2fdbd5f772.png

I typoed, I meant your NOR.  But you can do this with NOR too, so I guess I stand partially corrected.  However, nobody makes computers completely out of TTL gates anymore, so my point does have some merit.

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Saturnus    3,303
25 minutes ago, Arnadath said:

Both our designs have a problem, and it's the same problem. If you change the input from "00" to "11" there will be a 1 tick of '1' in the output. You can fix the behavioural by making the nor condition happen 1 tick later than the AND condition, with two OR gates in each input.  

Not sure but the buffer and filter gates set at 0.1s is one frame delays, right? If so that's an easy fix.

That wasn't the point of my post though. It was merely demonstrating that a NAND made of two inverters is good logic building block. Even in ONI.

22 minutes ago, Zarquan said:

I typoed, I meant your NOR.  But you can do this with NOR too, so I guess I stand partially corrected.  However, nobody makes computers completely out of TTL gates anymore, so my point does have some merit.

That's why I specifically mentioned the NOR (at it's most basic level) was unbuffered on the inputs and therefore has limited practical use. But you certainly can still do it with just resistors on a breadboard.

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Arnadath    69
53 minutes ago, Saturnus said:

Not sure but the buffer and filter gates set at 0.1s is one frame delays, right? If so that's an easy fix.

@Saturnus Short answer is no. They are unreliable substitute. A buffer gate for example, will change the output from off to on within one frame after receiving  a 'true' in the input, but the transition from on to off, will last one frame, plus a game time check which means randomly 1 or 2 more ticks.

Do this experiment in debug mode:exp.thumb.png.de4626e43ab6a9fbd577b288cfde1462.png

Both filter and buffer gate are at 0.1 sec

Just flick the switch while unpaused. The mechanism is set so that it skips the initial automation step, and counts how many automation steps takes for the "real time" transition to happen. In slow speed, you'll see the buffer gate will delay transiting randomly for 1 up to 2 steps. In the highest speed, it might take even more than 5 steps. Filter gate also expressses this eratic behaviour but it's only apparent in slow speed.

The or gate will always transit at automation step, thus it will never ever change any of the outputs

If you are trying to do synchronous automation and you utilize even one of them in your design, your system will always get out of whack pretty quickly.

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Saturnus    3,303
11 minutes ago, Arnadath said:

@Saturnus Short answer is no.

That would have sufficed. An OR or AND gate then as delay? I know then we're technically not exclusively using NOTs but you gotta roll with what you've got.

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Arnadath    69

@Saturnus. Yep. Here is a version of your xor that won't produce this pulse We just confirm for nor condition before we confirm for nxnor condition. 

exp.png.a1886ba57ef5c7291c65a883b140ff21.png

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Saturnus    3,303
19 minutes ago, Arnadath said:

@Saturnus. Yep. Here is a version of your xor that won't produce this pulse We just confirm for nor condition before we confirm for nxnor condition. 

I would just have used ANDs as delays without changing anything. Like this:

image.thumb.png.b41e6ab7379a4408f4ba0de4eb7fdad6.png

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Arnadath    69
5 minutes ago, Saturnus said:

I would just have used ANDs as delays without changing anything. Like this:

image.thumb.png.b41e6ab7379a4408f4ba0de4eb7fdad6.png

Judging by the picture, this will also work because your time critical path is 2 ticks.

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Gurgel    1,134
4 hours ago, KittenIsAGeek said:

I think its amazing that because of the formal logic arguments developed by the ancient greeks (and other cultures), we can use a simple NOT gate to build pretty much all our technology.  ONI, video streaming, cell phones, teh intertubes, whatever.  It all boils down to NOT gates.

You actually need NOT and AND or OR, or, alternatively, just NAND or NOR. 

In the real world, you can do wired-AND and wired-OR as well, with the right type of output (open collector or open drain). It is rarely used though as it has really bad switching characteristics.

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Yunru    1,121
1 hour ago, Gurgel said:

You actually need NOT and AND or OR, or, alternatively, just NAND or NOR. 

As evident above, you only need NOT and OR. AND is just a product of those.

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badgamer123    100

I would like to be a bit of greedy to ask,
any idea to create a logic loop that work like door pump but shut off each other first?
my problem is I got a very very far end place that only supplying 1kW power (sometime 2kW when other place have power left)
I recent want to expansion. I could do the normal shutoff SB switch thing,but I need 3 circuit all running 2KW.
Thus I need to connect battery A  for 20 second then close then open battery B for 20 second then Close B and open C ,then loop back to A
really like to avoid memory gate as it a bit unstable.I put in a door pump logic gate there but it have that 0.1 second of connected more then 1 circuit.
Really like to using buffer,not,filter gate as they are more stable without fail

20190221212615_1.jpg

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Saturnus    3,303
33 minutes ago, badgamer123 said:

Really like to using buffer,not,filter gate as they are more stable without fail

This should work. Filters set to 20s each.

image.thumb.png.bf448827b6346d7bae69ddcd2e7f086c.png

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