Arnadath's canon of gate equivalence

[Arnadath]

Or else: "How to make ALL gates out of NOT gates":

This is an addendum to my big project. You won't necessarily need it, but it will help deobfuscate some of the things that i'll be doing. It might help you in some cases.

As a bonus, here is a NOR memory

 

Now, mind you they take 2 ticks to setle instead of 1 like the in game gates (the XOR one takes 6 in edge cases) but they oftentimes are very easily cascadable, depending on your applications.

e.g.: An 8-in-1 and configuration

 

This for now. Later.

[Yunru]

You can sometimes make a memory cell out of just two NOT gates. I've had it work flawlessly and had it cycle endlessly with the exact same design, so...

[Arnadath]

 

4 minutes ago, Yunru said:

You can sometimes make a memory cell out of just two NOT gates. I've had it work flawlessly and had it cycle endlessly with the exact same design, so...

The basis of the circuitry in the NOR mem, are those two not gates in the middle. The other not gates are for set and reset purposes. You might as well remove them if it's just this one cell. I want to cascade them, so...

[Yunru]

7 minutes ago, Arnadath said:

 

The basis of the circuitry in the NOR mem, are those two not gates in the middle. The other not gates are for set and reset purposes. You might as well remove them if it's just this one cell. I want to cascade them, so...

Yeah that's what I meant. Watch out for it because sometimes it will just pulse endlessly for some reason.

[biopon]

I love that NOR mem. I've been using this:

But @Arnadath's is just 4 not gates if you reverse the input conditions, which I more often than not do anyway.

 

 

 

[Gurgel]

Interesting. This must be an artifact of how ONI evaluates logic.

[Arnadath]

 

2 hours ago, Gurgel said:

Interesting. This must be an artifact of how ONI evaluates logic.

Not at all an artifact. All logic circuitry is build upon NOT gates and what i suppose you could call YEAH gates. We just no no, whenever we cannot yes.

[Saturnus]

@Arnadath 

 

[Arnadath]

7 hours ago, Saturnus said:

@Arnadath 

 

Yes, well, i expanded on the topic. I show you how to also make a XOR gate

[Saturnus]

6 minutes ago, Arnadath said:

Yes, well, i expanded on the topic. I show you how to also make a XOR gate

In a way, yes but mostly no.

My thread showed with a practical example the same basic thing, NOTs replacing ANDs and ORs, but more importantly that you can use the nature of sensor outputs to eliminate lots of needless automation.

The point being that everyone that is interested in logic gates already knows they're made up of inverters. And the exact set up is easy to find with google. They were even described in detail, also the XOR gate made of NOTs in an earlier thread on this forum already (although it's probably so long ago it's an archived thread and therefore difficult to find with the search feature).

I'm attempting to illustrate how people can use it in the game even if they might not know much or anything about logic gates. And that's my point here. Show some examples where it can be useful to use this over just using the logic gates, so that more people get used to thinking about logic gates as a string of inverters.

[Arnadath]

@Saturnus I see your point. And i won't debate wether somebody had a similar post before, nor will i debate that simplicity in your structures is of importance when it comes to you practical applications.But this thread is not about practical applications This post should be viewed in context of the designing prospects of digital circuits when it comes mainly to cramming more 'necessary' stuff together in a tightier space. Take this for example:

This is an itterator circuit that drives the bit shifter/rotator. It is essentially something like this in higher languages:
 

While(unsigned int i=x  ; i<8 ; i++){

Produce_A_Pulse(); }

Where x is anywhere from 0 up to 7 .

Half the circuit is not gates, of which half of them are there for timing, and the rest to emulate other gates and solve our HUGE topological issues for the sacrifice of some speed.

So take this whole post for it's "designing circuits" perspective, not it's practical in-game perspective.

[Gurgel]

14 hours ago, Arnadath said:

Not at all an artifact. All logic circuitry is build upon NOT gates and what i suppose you could call YEAH gates. We just no no, whenever we cannot yes.

Ah, I see where you went wrong and momentarily confused me. The OR is just the wires, no need for the NOT gates. This is a very traditional "wired OR" in negative logic (positive logic typically gives you a wired-AND, as low-side switches have far better properties due to semiconductor physics).

The rest is just standard Boolean Algebra https://en.wikipedia.org/wiki/Boolean_algebra. 

Wired ("free") gates have been around forever, but are rarely used because they have very asymmetric driving characteristics (very slow for one direction of signal change). For ONI that does not matter, of course, as the game does not model that. It is nice to see this thing again!

[Saturnus]

5 minutes ago, Gurgel said:

Ah, I see where you went wrong and momentarily confused me. The OR is just the wires, no need for the NOT gates.

Well, you do need them to isolate them from the source.

[Gurgel]

35 minutes ago, Saturnus said:

Well, you do need them to isolate them from the source.

I don't think so. You only need to do that when the source is part of several wired-OR that can have different output state.

[Saturnus]

38 minutes ago, Gurgel said:

I don't think so. You only need to do that when the source is part of several wired-OR that can have different output state.

Yes. Exactly. Or if the source feeds multiple gates which is exceedingly likely.

[Gurgel]

2 hours ago, Saturnus said:

Yes. Exactly. Or if the source feeds multiple gates which is exceedingly likely.

Only of these other gates are also of the "wired" variant. There are no actual buffering needs here (unlike real digital electronics), just prevention of "backflow".

[impyre]

I love that post. It's a very good demonstration of using intuitive basic boolean algebra for circuit simplification. 

(A^B^C) = --(A^B^C) = -(-A + -B + -C)

And since if A = Sensor over 500Kg, then -A = Sensor below 500Kg, so we can change our sensors trigger from above to below and change -(-A + -B + -C) to -(A+B+C) which is way simpler to build.

Really, it's realizing that changing the sensor trigger condition basically negates the sensor output that changes how you can approach the problem.

BTW: If anyone wants to use the above distributive rule to help with simplifying their own circuits, it's this easy... ^ is AND, + is OR, and - is NOT, - and - cancel each other out when in pairs. Signals (variables) that are grouped in parentheses represent a multi-input or grouped gate. The 8 input gate above would be -(-A + -B + -C + -D + -E + -F + -G + -H). The last rule is that when you move a NOT (-) from inside a parentheses to the outside, or from the outside to the inside, you have to switch all the operators and distribute the sign to every variable. So for example:

-(-A + -B + -C + -D + -E + -F + -G + -H) --> OR gate with 8 negated inputs and one negated output**

take the outermost symbol and distribute it

(--A + --B + --C + --D + --E + --F + --G + --H)

but don't forget to switch all your operators

(--A ^ --B ^ --C ^ --D ^ --E ^ --F ^ --G ^ --H)

Then finally you can cancel

(A^B^C^D^E^F^G^H) --> AND gate with 8 inputs**

The cool thing about this math is that it works both ways. And you can always add a double NOT without changing anything... just stick a -- wherever you like, especially if it gives you some things to move around so you can simplify it. Just remember that we almost always prefer OR to AND since it decreases number of gates needed.

**Notice that an OR gate with all inputs negated and all outputs negated is essentially and functionally identical to an AND gate with no negation.

[Arnadath]

@impyre And not only. You can do really cool stuff with timings by arranging NOT's and OR's to specifically filter parts of your signal. I'm working now on this thing. 

I call it the 'pulse accumulator'. It detects if a signal went from 'off' to 'on' for 1, 2, 3 or 4 pulses and sets those 2 latches. Basically it's like an on-the-spot demultiplexer. And very easily cascadable to detect more pulses. The way automation works in this game, it's like every component is clocked to a global NOT gate connected to itself. And it's up to us to utilise it efficiently

[Saturnus]

11 hours ago, impyre said:

I love that post.

Thank you

[tzionut]

Can some one help whit a 4 door compressor circuit whit a shut off switch. I find something but i can't turn off. Is for my lava experiment  

Thank you

[Yoma_Nosme]

2 hours ago, tzionut said:

Can some one help whit a 4 door compressor circuit whit a shut off switch. I find something but i can't turn off. Is for my lava experiment  

Thank you

Use an AND Gate.

First Input comes from your compressor.

Second input you use a switch or the sensor you need to give the desired shut off signal.

Output back to the compressor.

[tzionut]

Thank you @Yoma_Nosme.. i find something simple and useful . The version which i used first was more complicated

 

 

[Saturnus]

@Arnadath I'm not sure why I didn't comment this sooner but I wasn't really paying attention I guess.

As we know there's two types of universal gates which we can build any circuit from. At the most basic level the NAND is two inverters with the outputs tied together. And the NOR is a single inverter with the inputs tied together. The NOR is at its most basic level unbuffered on the inputs so its uses can be limited.

With the knowledge that NAND gates are "perfect" universal gates for our purpose as they're inherently buffered, we can start building circuits using just NAND gates as is most often the case in real life. For example here I've built a XOR gate from 4 NAND gates, ie. 8 NOTs down from 11 as in your example using mixed gates.

[KittenIsAGeek]

I think its amazing that because of the formal logic arguments developed by the ancient greeks (and other cultures), we can use a simple NOT gate to build pretty much all our technology.  ONI, video streaming, cell phones, teh intertubes, whatever.  It all boils down to NOT gates.

[Zarquan]

4 minutes ago, KittenIsAGeek said:

I think its amazing that because of the formal logic arguments developed by the ancient greeks (and other cultures), we can use a simple NOT gate to build pretty much all our technology.  ONI, video streaming, cell phones, teh intertubes, whatever.  It all boils down to NOT gates.

Not quite.  In the real world, you can't just link two outputs without shorting your system.  All the places where two output wires merge, we need an OR gate.  But not in ONI.

For example, in Saturnus's NAND, he has the wires from the two signal switches link up.  If you were to do this in the real world, and the two switches were opposite, it would short circuit.